
| Studiengänge >> Mechatronics for Manufacturing 2026 B.Eng. >> Programmable Circuits |
| Code: | 321000 |
| Module title: | Programmable Circuits |
| Version: | 1.0 (11/2025) |
| Last update: | 02.12.2025 |
| Responsible person: | Prof. Dr.-Ing. Kästner, Wolfgang w.kaestner@hszg.de |
| Offered in study course: | Mechatronics for Manufacturing (B.Eng.) valid from the class 2026 ( elective core module) |
| Semester according to time table: | SoSe (summer semester) |
| Module level: | Bachelor |
| Duration: | 1 semester |
| Status: | elective core module |
| Place where the module will be offered: | Liberec |
| Language of Instruction: | English |
| Workload* in | SCH ** | |||||||||||||||||||||||||
| hours | ECTS Credits |
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| * | Overall workload per module (1 ECTS credit corresponds to a workload of 30 hours) |
| ** | One semester credit hour (SCH) corresponds to a workload / class meeting of 45 minutes per week in a semester |
| Self study time in hours | ||||
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| Learning and teaching methods: | The methodical aspects of the topic will be communicated by lectures. Seminars and exercises as well as practical courses at laboratory serve for consolidation of knowledge. |
| Further information: | The content and implementation of the module are the responsibility of the TU Liberec. Person responsible on TUL: prof. Ing. Ondřej Novák, Cs.C. ondrej.novak@tul.cz |
| Exam(s) | |||
| Assessments | Major exam (laboratory work) | 50.0% | |
| Major written exam | 180 min | 50.0% | |
| Syllabus plan/Content: |
Basic hardware modules in digital electronics VHDL language VHDL language Laboratory equipment used in the subject FPGA AMD, FPGA properties Processors on the FPGA ROM, EEPROM, CPLD circuits Other types of FPGA circuits, SOC circuits, FPGA power consumption FPGA reconfiguration ASIC and FPGA codesign |
| Learning Outcomes: | |
| Subject-specific skills and competences: | The students get familiar with VHSIC hardware description language, modern families of programmable circuits and EDA tools, concepts and methodologies. They will learn how to use top-down and bottom-up design metodologies to design complex digital circuit. The students are able to describe digital circuits in HD language, simulate them and implement them on an FPGA circuit. |
| Generic competences (Personal and key skills): | The students are able to create and realize strategies for problem solving from the individual point of view or as a result of teamwork. The students use approaches of system theory. The students evaluate their results and are able to present the results. |
| Pre-requisites: | competence from following module (without burden of proof): Digital Electronics |
| Optional pre-requisites: | competence from module : Advanced digital circuit design |
| Literature: | Digital Design and ComputerArchitecture. (David Harris, Sarah Harris,) ( DOI: 10.5555/2815529 ) Clive Maxfield. The Design Warrior´s Guide to FPGAs. 2004. ISBN 0-7506-7604-3. IEEE. IEEE Standard for VHDL Language Reference Manual. IEEE Std 1076-2019. 2019, s. 1–673. Dostupné z DOI: 10.1109/IEEESTD.2019. 8938196. AMD, INC. 7 Series FPGAs Configurable Logic Block User Guide (UG474). 2025. Dostupné také z: https://docs.amd.com/r/en- US/ug474_7Series_CLB. AMD, INC. 7 Series FPGAs SelectIO Resources User Guide (UG471). 2018. Dostupné také z: https://docs.amd.com/v/u/en-US/ug471_7Series_SelectIO. |